On Tue, Apr 14, 2015 at 5:41 AM, Ingo Molnar <mingo(a)kernel.org> wrote:
2) pmem devices as 'memory':
Battery backed and similar solutions of nv-dram, these are probably a
lot smaller (for cost reasons) and are also a lot more RAM-alike, so
the 'struct page' allocation in main RAM makes sense and possibly
people would want to avoid the double buffering as well.
Furthermore, in this case we could also do another trick:
> - Intel has proposed changes that allow block I/O on regions that aren't
> page backed, by supporting PFN-based scatterlists which would have to be
> supported all over the I/O path. Reception of that code has been rather
> mediocre in general, although I wouldn't rule it out.
> - Boaz has shown code that creates pages dynamically for pmem regions.
> Unlike the old Intel e820 code that would also work for PCI backed
> pmem regions. Boaz says he has such a card, but until someone actually
> publishes specs and/or the trivial pci_driver for them I'm inclined to
> just ignore that option.
> - There have been proposals for temporary struct page mappings, or
> variable sized pages, but as far as I can tell no code to actually
> implement these schemes.
None of this gives me warm fuzzy feelings...
... has anyone explored the possibility of putting 'struct page' into
the pmem device itself, essentially using it as metadata?
Yes, the impetus for proposing the pfn conversion of the block layer
was the consideration that persistent memory may have less write
endurance than DRAM. The kernel preserving write endurance
exclusively for user data and the elimination of struct page overhead
motivated the patchset .