On November 5, 2015 3:59:46 PM PST, Dan Williams <dan.j.williams(a)intel.com> wrote:
On Wed, Oct 28, 2015 at 3:51 PM, Ross Zwisler
> On Wed, Oct 28, 2015 at 06:24:29PM -0400, Jeff Moyer wrote:
>> Ross Zwisler <ross.zwisler(a)linux.intel.com> writes:
>> > This series implements the very slow but correct handling for
>> > blkdev_issue_flush() with DAX mappings, as discussed here:
>> > https://lkml.org/lkml/2015/10/26/116
>> > I don't think that we can actually do the
>> > on_each_cpu(sync_cache, ...);
>> > ...where sync_cache is something like:
>> > cache_disable();
>> > wbinvd();
>> > pcommit();
>> > cache_enable();
>> > solution as proposed by Dan because WBINVD + PCOMMIT doesn't
>> > your writes actually make it durably onto the DIMMs. I believe
you really do
>> > need to loop through the cache lines, flush them with CLWB, then
>> > PCOMMIT.
>> So much for not violating the principal of least surprise. I
>> you've asked the hardware folks, and they've sent you down this
> Sadly, yes, this was the guidance from the hardware folks.
So it turns out we weren't asking the right question. wbinvd may
indeed be viable... we're still working through the caveats.
Do not disable the caches here.
Sent from my Android device with K-9 Mail. Please excuse my brevity.