This small patchset does some clean-up and tries to add some tips when
memmap does not work.
Fabian Frederick (8):
libnvdimm, namespace: update message level on smaller reservations
libnvdimm, namespace: add verbosity to persistence warning
libnvdimm, namespace: move persistence warning
libnvdimm, namespace: avoid multiple sector calculations
libnvdimm: remove else after return in nsio_rw_bytes()
libnvdimm, namespace: use octal for permissions
mm: warn about possible alignment problem
mm: use SECTION_MASK where possible
drivers/nvdimm/claim.c | 5 ++---
drivers/nvdimm/namespace_devs.c | 8 ++++----
drivers/nvdimm/pmem.c | 18 +++++++++---------
kernel/memremap.c | 10 +++++-----
4 files changed, 20 insertions(+), 21 deletions(-)
Great New Opportunities for Smart Scientists/Engineers for November:
A) Software Manager II (Pleasanton, CA)
My exciting Biotech Client uses nanoliter-sized droplets as reaction vessels to power a super-precise digital nucleic acid measurement method (droplet digital PCR). Now that they’ve solidified their market lead in digital PCR, they are expanding into diagnostic applications for core technology. A lot of interesting molecular biology can be done with thousands of nanoliter-sized reactors.
They need a creative software engineering manager with strong interpersonal skills to lead a dynamic software team building the next generation ddPCR applications. Major product functions include instrument control, data collection, visualization and analysis. You will work closely with MEs, EEs, ChEs & chemists, fluidics engineers, and molecular biologists.
· You have a technical background and are able to contribute to planning and design discussions. In addition to .NET/C#, you have some experience in Python, C++ or Java.
· You have experience leading a team and guiding them in their career development.
· You believe in building both teams and products that are responsive and high quality.
· You can motivate and instill a strong sense of ownership in your team.
· You have experience guiding teams through planning, prioritization, and execution of work using the Scrum framework. You are steadfastly focused on your customers.
· You are comfortable engaging in a back-and-forth with scientists, marketing, and regulatory personnel to figure out what we really need to provide.
· You enjoy sharing your expertise. You make everyone around you better. You like working as part of a team. You think ahead and build for the future.
· 10 years experience in SW development with at least 5 years as a manager designing and developing desktop apps in .NET/C# for life science or medical capital equipment.
· Experience developing regulated products for FDA, CLIA, CFR11/21, CE/IVD and cFDA.
· You have at least a BS in a relevant field, MS preferred.
· Solid understanding of and demonstrated experience using agile project management tools such as Jira/Greenhopper, Rally, VersionOne or equivalent. You believe in TDD.
· Experience with continuous integration/automated test tools such as Jenkins or TeamCity, and configuration/provisioning & deployment management: Puppet, Ansible.
B) Research and Development Manager II, Pleasanton, CA
My client makes instruments that are used in basic and clinical biology research. They are looking for a Computational Biology Manager who wants to drive rapid growth. The Computational Biology team is responsible for doing hard-core algorithm work and for building computational methods and tools to support their hardware and the wet lab tools that make their instruments rock. Their most recent success is a website that allows the customer to design and buy a ddPCR assay on-the-fly for any sequence,on line.
If they could find someone with 10 years experience in Computational Biology plus Ph.D’s in biology, computational biology, and statistics, they would be hired in a heartbeat. But lacking that, they are looking for a lead/manager who is jazzed about working on an instrument that exists in the physical (not just the virtual) world. You’ll use your understanding of molecular biology and statistics help develop requirements for and plan projects with our mixed crew of bioinformatics scientists and software engineers.
What You'll be Doing:
Identify and hire for required attitude and skills. Train, mentor, develop and retain highly skilled personnel.
Work in cross-functional matrixed environment where complex systems involving hardware, consumables and software are developed and commercialized.
Support R&D and validation efforts, commercial, field personnel and customers as needed.
Develop and execute product roadmaps. Identify and demonstrate key capabilities of integrated systems and applications.
Define new and extend current applications of ddPCR and future technologies.
Lead collaborations, as needed, with key customers and thought leaders.
Manage a content development program where thousands of assays are developed and validated for important biological targets.
Select development technologies, make recommendations and decisions on product definition, requirements, specifications and test report documents.
Support FDA and /or IVD registration for our products.
Help analyze/interpret NGS data.
What’s in it for you:
Competitive pay and great benefits including medical, dental, vision, 401k and more.
Opportunities for training, growth, and mobility.
Stability of a profitable 60+ year old company.
Great work environment.
What you need for this role:
You’re a strong manager with at least five years’ experience working in Computational Biology. Relevant MS required, Ph.D. preferred.
You enjoy sharing your expertise. You make everyone around you better.
You don’t expect to get all the requirements in advance.
You are comfortable engaging in a back-and- forth with scientists and engineers to figure out what we really want to build.
You recognize that this isn’t indecision or lack of direction, it’s R&D and it’s cutting edge science.
You have worked with Marketing groups to develop MVP requirements that your team can implement in a reasonable time frame.
You can work with the CompBio team to come up with the best technical solutions, keeping in mind possible future capabilities.
You are an assay design expert who wants to work closely with molecular biologists on developing assay strategies (Eg. CRISPR assays, multiplex assays).
You can perform and teach in-depth analysis of NGS data.
You have shipped more than one product line.
You have very strong communication, presentation and writing skills.
You have experience in digital genomics – NGS or dPCR highly desired
Previous (Still Open) Searches:
My exciting long-term/repeat client in the field of Nanotube-based memory is searching for an expert coatings engineer in the Austin area. Relocation will not be assisted, for this position, but competitive salary and stock options, as well as benefits will be provided. This is 'disruptive' technology in advanced future memory.
1) Coatings Engineer (Semiconductors/Nanotechnology)
Improve, operate and maintain a set of semiconductor processing and metrology equipment to assist in the processing of silicon wafers in the clean room. Process and Inspect customer 200mm and 300mm wafers using various process and metrology tools.
Improve existing processes/procedures through the use of statistical experimental design, execution and analysis. Meticulous recording of details in electronic logbooks and lab notebooks. Work on assignments and projects that are routine as well unique in nature, where high level of judgment is required.
Capable of installing new equipment, monitoring operations, trouble-shooting and repairing any equipment problems. Must be self-starting and able to work independently with little or no supervision.
ESSENTIAL DUTIES & RESPONSIBILITIES:
• Operate spin coat, and related metrology equipment
• Improve processes using advanced DOE methods and statistical analysis
• Setup, operate, and monitor process equipment
• Evaluate and test new equipment
• Perform preventive maintenance, calibration and repair of equipment
• Assist in technical writing of semiconductor processing specifications, within defined parameters
• Perform detailed experimentation
• Ensure adherence to Nantero policies and procedures
• Awareness of safety for self and others
• Perform miscellaneous job-related duties as assigned
MINIMUM JOB REQUIREMENTS:
The applicant must have over 10 years process experience in semiconductor fabrication, or BS degree and over five years experience in semi-fabs. Must be proficient in use of advanced spin coat process tools, including metrology, SPC and DOE.
KNOWLEDGE, SKILLS & ABILITIES REQUIRED:
• Must be extremely detail oriented with excellent documentation skills/experience
• Ability to gather data, compile information and prepare reports
• Knowledge of clean room operations and/or procedures
• Ability to understand and follow complex, detailed technical instructions
• Knowledge of advanced fab cleanliness and quality standards
• Skill in collecting, analyzing, verifying and manipulating experimental data
• Experience in statistical DOE and analysis
• Proficient in JMP or R (or equivalent)
• Ability to work with limited or no supervision
Class 1/10 compliant process equipment operating in a class 10 clean room environment wearing clean room garments and personal protective equipment. Will be required to work around the following hazards: high voltage, high temperature heat sources and noise; and to follow the proper safety procedures for self and others. Expect to work in cleanroom 6-8 hours per day. Must be able to climb ladders and carry 300mm fully loaded FOUPs.
LOCATION: Austin, TX
Do you love disruptive technology?
My new client in Albuquerque, NM is a well-funded, privately held company with a very disruptive and innovative integrated optical technology designed to support an entire opto-electronic communications ecosystem on a single chip.
Now, the company is poised for growth and success. They are revolutionizing the transceiver and subsystem supply chain enabling the delivery of next generation high speed infrastructure products. Additionally, the founders have a successful track record in both large and startup companies. Competitive compensation and equity will be offered.
US News recently ranked Albuquerque one of the best cities to live and work in:
2) Senior Director of Subsystems Engineering
Reports to: VP of Engineering
-Lead a team of hardware, software and optical developers in the development of subsystem level product platforms for silicon-based optical ASICs
-Lead the development of a test infrastructure and methodology for subsystem level products
-Lead the verification and qualification for subsystem level products
Basic Minimum Requirements:
-M.S. or PhD in Electrical Engineering, Computer Science or a related field. Individuals with a BS degree and appropriate experience as well as exceptional ability will also be considered.
-Strong leadership skills.
-Strong experience in board design and software design for high capacity optical communications line cards including control of , monitoring of and interfacing with
relevant optical components
-Successful track record of bringing line cards, subsystems, and/or systems to market and wide deployment including, in particular product HW/FW integration.
-Strong problem-solving skills
-Effective communication and presentation skills
-Ability to operate in a dynamic startup environment
-Experience as a high-speed board designer with strong RF experience a plus
-Familiarity with integrated optics, fiber optics, electronics and/or optical communications technology a plus
Essential Job Functions:
-Subject to change from time to time to meet the needs of the Company
-Solves unique and difficult technical problems to improve upon product performance
-Works on products and projects of wide range and scope to meet aggressive goals and schedules
-Other duties as assigned; some travel
3) Senior Datacom Transceiver Design Engineer
Reports to: SVP Engineering, Mfg. and Operations
The Senior Datacom Transceiver Design Engineer will be responsible for the design of the Datacom transceiver module electrical printed circuit board subsystem.
MSEE minimum, PhD preferred in Electrical Engineering
Skill, Knowledge and Abilities:
-Responsible for schematic generation and printed circuit board design
-Interface with mechanical engineering, optical IC engineering, Electrical IC engineering, and production teams in generation of board design requirements and design specifications
-Direct management of board layout devices, board fabrication resources, and board assembly resources
-Responsible for design of board subsystem assembly including design of IC to board interfaces, board to mechanical/thermal interfaces, assembly requirements, and board-level test procedures
8 to 10 years of relevant Datacom and or Telecom industry experience
Essential Job Functions:
-Functions are subject to change from time to time to meet the needs of the Company
-Analyzes best approach to solving problems, applies existing technology in new ways to improve performance as well as productivity
-Develops new technology to solve unique problems
-Works collaboratively and productively with all parties
-Works on projects of varying scope, timelines and schedules
-Other duties as assigned; some travel
4) Laser Designer
Reports to: VP of Engineering
My client is seeking a top-level laser designer with extensive laser design experience and knowledge of III-V materials and laser physics
The Laser Design Engineer will develop highly advanced laser systems, from concept to product. This is an opportunity to work with a highly motivated, high performance technical team on highly differentiated, disruptive technology.
Education and Experience:
-MS or PhD in Material Science, Electrical Engineering, or Applied Optics
-Five (5) years of hands-on design experience in semiconductor lasers with emphasis
on III-V materials preferred
- Must have a proven track-record of success, from concept to manufacturing
-Must have a background in III-V materials, especially as applied to optoelectronic devices.
-Experience in the design, simulation, testing and analysis of III-V lasers.
-Experience working with process engineers to define fabrication methods, layout and test requirements.
-Able to perform short- and long-term testing of devices to ensure products meet design objectives and client specifications.
-Track record of successfully identifying and resolving product issues during all phases of the product life cycle to include the design and production.
-Ability to work in a dynamic startup environment.
-Excellent verbal and written communication skills.
Essential Job Functions:
Functions are subject to change from time to time to meet the needs of the Company
Design, simulation, testing and analysis of III-V lasers
Drive technology transfer to manufacturing.
Document process specifications and train relevant personnel when needed.
Prepare for, and deliver presentations to customers as required.
Other duties as assigned; some travel
NOTES: Must have
· Designed (not just used) DFB (distributed feedback) lasers, external cavity lasers, tunable lasers, or semiconductor optical amplifiers (SOA), etc
· Designed/optimized semiconductor (InP) quantum wells for laser gain material
· Designed/optimized semiconductor laser cavities for maximum laser efficiency or maximum laser power
· Familiar with laser waveguide design on semiconductor chips
5) Title: Device Reliability Engineer
Reports to: VP of Engineering
My client is seeking a top-level Device Reliability Engineer with extensive laser experience and knowledge of III‐V materials and laser physics.
The Device Reliability Engineer will be responsible for developing advanced qualification tests
and reliability models, new product qualification requirements, and device reliability models.
Responsibilities will include analysis, reporting and presentation of reliability/qualification
data and reliability models of device lifetime. This is an opportunity to work with a highly motivated, high performance technical team on highly differentiated, disruptive technology.
Basic Minimum Requirements:
Education and Experience:
M.S. or Ph.D. Applied Physics, Electrical Engineering, Material Science or a related field. Applicants with a B.S. degree who have exceptional experience and technical expertise will be considered. Ten (10) years of hands-on industry experience in reliability qualifications for semiconductor laser products with an emphasis on III‐V materials preferred. Must have a proven track record of success, from concept to manufacturing.
Must have a background in III-V materials, especially as applied to optoelectronic devices, with a preference for InP‐based optical communications lasers; laser design experience a plus.
Experience in developing qualification testing, and analysis to include estimating FIT rates, ability to define guard band for end of life performance, strong knowledge of burn-ins and aging techniques. Familiar with surveillance plans; knowledge of EAM Reliability a plus.
Able to perform short and long term testing, developing statistical models of devices to ensure products meet design objectives and customer specifications in the field. Lead and track product reliability assessments including Failure Analysis and design reliability while
successfully identifying and resolving product issues during all phases of the product life cycle to include the design, development and production. FMEA to insure reliable designs. Work with other cross functional teams, suppliers and customers in defining environmental qualification reliability testing and analysis. Strong problem solving and statistical skills. Ability to operate in a dynamic start-up environment.
Reliability Evaluations and Qualification Tests: initiate, plan and execute for existing products, new products and new technologies.
Component Modeling: Develop lifetime component and system models to ascertain product/process reliability risk and determine failure rates.
Program Management: determine program scope, budgetary costs, and schedule/timeline as well as evaluate and minimize program risk.
Communication: develop and distribute documentation of qualifications and evaluations; advise customers on technical issues and create/make technical presentations to management and team members.
If you are interested in any of these outstanding opportunities, please send me a resume. Random resume submissions are always welcome, too. Referrals and recommendations are greatly appreciated.
Wingate Dunross, Inc.
ph (818)597-3200 ext. 211
Tracepoints are the standard way to capture debugging and tracing
information in many parts of the kernel, including the XFS and ext4
filesystems. This series creates a tracepoint header for FS DAX and add
the first few DAX tracepoints to the PMD fault handler. This allows the
tracing for DAX to be done in the same way as the filesystem tracing so
that developers can look at them together and get a coherent idea of what
the system is doing.
I do intend to add tracepoints to the normal 4k DAX fault path and to the
DAX I/O path, but I wanted to get feedback on the PMD tracepoints before I
went any further.
This series is based on Jan Kara's "dax: Clear dirty bits after flushing
I've pushed a git tree with this work here:
Changes since v1:
- Dropped the patch fixing the build issue between DAX, ext4 and FS_IOMAP.
I'll resend an updated patch if needed once Jan's patches for this issue
- Added incude/linux/dax.h to MAINTAINERS in patch 4. (Matthew)
- Begin each DAX tracepoint with the device major/minor and the inode so
that we are consistent with the XFS tracepoints. This will allow for
easy grepping of the tracepoint output. (Dave)
- Print all PMD fault flags, not just whether we are doing a read or a
- Added __print_flags_u64() and the necessary helpers to the tracing
infrastructure. These functions allow us to print symbols associated
with flags that are 64 bits wide even on 32 bit machines. We need this
for the pfn_t flags.
Ross Zwisler (6):
tracing: add __print_flags_u64()
dax: remove leading space from labels
dax: add tracepoint infrastructure, PMD tracing
dax: update MAINTAINERS entries for FS DAX
dax: add tracepoints to dax_pmd_load_hole()
dax: add tracepoints to dax_pmd_insert_mapping()
MAINTAINERS | 5 +-
fs/dax.c | 80 +++++++++++++--------
include/linux/mm.h | 25 +++++++
include/linux/pfn_t.h | 6 ++
include/linux/trace_events.h | 4 ++
include/trace/events/fs_dax.h | 161 ++++++++++++++++++++++++++++++++++++++++++
include/trace/trace_events.h | 11 +++
kernel/trace/trace_output.c | 38 ++++++++++
8 files changed, 300 insertions(+), 30 deletions(-)
create mode 100644 include/trace/events/fs_dax.h
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