Hi Dmitry, Thank you for the patch! Yet something to improve: [auto build test ERROR on next-20200929] [also build test ERROR on v5.9-rc7] [cannot apply to iio/togreg robh/for-next linus/master agross-msm/qcom/for-next v5.9-rc7 v5.9-rc6 v5.9-rc5] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Dmitry-Baryshkov/qcom-pm8150-add... base: 49e7e3e905e437a02782019570f70997e2da9101 config: ia64-allmodconfig (attached as .config) compiler: ia64-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/c13f45be7731fe856b6baf1f65ebc7c5c... git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Dmitry-Baryshkov/qcom-pm8150-add-support-for-thermal-monitoring/20200930-180410 git checkout c13f45be7731fe856b6baf1f65ebc7c5cf6f5953 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=ia64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp(a)intel.com&gt; All errors (new ones prefixed by >>): drivers/thermal/qcom/qcom-spmi-adc-tm5.c: In function 'adc_tm5_configure': 296 | buf[6] |= FIELD_PREP(ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK, channel->hw_settle_time); | ^~~~~~~~~~ cc1: some warnings being treated as errors vim +/FIELD_PREP +296 drivers/thermal/qcom/qcom-spmi-adc-tm5.c 250 251 static int adc_tm5_configure(struct adc_tm5_channel *channel, int low_temp, int high_temp) 252 { 253 struct adc_tm5_chip *chip = channel->chip; 254 u8 buf[8]; 255 u16 reg = ADC_TM5_M_ADC_CH_SEL_CTL(channel->channel); 256 int ret = 0; 257 258 ret = adc_tm5_read(chip, reg, buf, sizeof(buf)); 259 if (ret) { 260 dev_err(chip->dev, "block read failed with %d\n", ret); 261 return ret; 262 } 263 264 /* Update ADC channel select */ 265 buf[0] = channel->adc_channel; 266 267 /* Warm temperature corresponds to low voltage threshold */ 268 if (high_temp != INT_MAX) { 269 u16 adc_code = qcom_adc_tm5_temp_volt_scale(channel->prescale, 270 chip->data->full_scale_code_volt, high_temp); 271 272 buf[1] = adc_code & 0xff; 273 buf[2] = adc_code >> 8; 274 buf[7] |= ADC_TM5_M_LOW_THR_INT_EN; 275 } else { 276 buf[7] &= ~ADC_TM5_M_LOW_THR_INT_EN; 277 } 278 279 /* Cool temperature corresponds to high voltage threshold */ 280 if (low_temp != -INT_MAX) { 281 u16 adc_code = qcom_adc_tm5_temp_volt_scale(channel->prescale, 282 chip->data->full_scale_code_volt, low_temp); 283 284 buf[3] = adc_code & 0xff; 285 buf[4] = adc_code >> 8; 286 buf[7] |= ADC_TM5_M_HIGH_THR_INT_EN; 287 } else { 288 buf[7] &= ~ADC_TM5_M_HIGH_THR_INT_EN; 289 } 290 291 /* Update timer select */ 292 buf[5] = ADC5_TIMER_SEL_2; 293 294 /* Set calibration select, hw_settle delay */ 295 buf[6] &= ~ADC_TM5_M_CTL_HW_SETTLE_DELAY_MASK; 297 buf[6] &= ~ADC_TM5_M_CTL_CAL_SEL_MASK; 298 buf[6] |= FIELD_PREP(ADC_TM5_M_CTL_CAL_SEL_MASK, channel->cal_method); 299 300 buf[7] |= ADC_TM5_M_MEAS_EN; 301 302 ret = adc_tm5_write(chip, reg, buf, sizeof(buf)); 303 if (ret) { 304 dev_err(chip->dev, "buf write failed\n"); 305 return ret; 306 } 307 308 return adc_tm5_enable(chip); 309 } 310 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org